DATA PROCESSING APPARATUS AND METHOD

    公开(公告)号:US20220405228A1

    公开(公告)日:2022-12-22

    申请号:US17894211

    申请日:2022-08-24

    Abstract: A data processing apparatus includes a first chip and a second chip that are stacked-packaged. The first chip includes a general-purpose processor, a bus, and at least one first dedicated processing unit (DPU). The general-purpose processor and the at least one first dedicated processing unit are connected to the bus. The general-purpose processor is configured to generate a data processing task. The second chip includes a second dedicated processing unit. At least one of one or more units in the at least one first dedicated processing unit and the second dedicated processing unit can process at least a part of the data processing task based on a computing function.

    HIERARCHICAL BUS ENCRYPTION SYSTEM
    2.
    发明申请

    公开(公告)号:US20190012472A1

    公开(公告)日:2019-01-10

    申请号:US16111228

    申请日:2018-08-24

    Abstract: A system includes at least two buses including a first bus and a second bus, an encryption and decryption system corresponding to each bus, at least one signal processing module corresponding to each bus, and a bus converter coupled between the first bus and the second bus. According to the system provided in embodiments of the present invention, because data transmitted on a bus is encrypted data, even though an attacker obtains bus data by means of a probe attack, it is quite difficult to break a key, and an anti-attack capability of the system can be improved.

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