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公开(公告)号：US20090322386A1
公开(公告)日：2009-12-31
申请号：US12480106
申请日：2009-06-08
Applicant: Han-Hau Wu
Inventor： Han-Hau Wu
IPC: H03B19/00
CPC classification number: H03K23/667 , H03K23/68
Abstract: A programmable divider apparatus comprises a first divider, a second divider, a feedback control unit, and a plurality of control signals. The first divider provides a frequency division operation of division by at least three integers, the second divider is cascaded to the first divider to provide a frequency division operation of division by two integers. The feedback control unit is coupled to between the first divider and the second divider to provide a feedback control signal to selectively supply an output of the second divider to an input of the first divider. The apparatus control signals and the feedback control signal are used to execute the first divider or the second divider.
Abstract translation: 一种可编程分频装置包括第一分频器，第二分频器，反馈控制单元和多个控制信号。 第一分频器提供除以至少三个整数的分频运算，第二分频器级联到第一分频器以提供除以两个整数的分频运算。 反馈控制单元耦合到第一分压器和第二分压器之间以提供反馈控制信号，以选择性地将第二分频器的输出提供给第一分频器的输入。 装置控制信号和反馈控制信号用于执行第一分频器或第二分频器。
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2.发明授权Single-ended input to differential-ended output low noise amplifier implemented with cascode and cascade topology 有权使用共源共栅和级联拓扑实现的差分端输出低噪声放大器的单端输入公开(公告)号：US07375590B2
公开(公告)日：2008-05-20
申请号：US11276830
申请日：2006-03-15
Applicant: Jiong-Guang Su , Tsyr-Shyang Liou , Ja-Hao Chen , Chih-Wei Chen , Shao-Hua Chen , Han-Hau Wu
Inventor： Jiong-Guang Su , Tsyr-Shyang Liou , Ja-Hao Chen , Chih-Wei Chen , Shao-Hua Chen , Han-Hau Wu
IPC: H03F3/45
CPC classification number: H03F1/26 , H03F3/45089 , H03F3/45183 , H03F2200/372 , H03F2200/534 , H03F2203/45316 , H03F2203/45332
Abstract: A low noise amplifier has the properties of low noise figure and high gain under a high-frequency operation. The low noise amplifier includes a first transistor, a first inductive impedance, a first gate voltage source, a matching circuit, an input, a second inductive impedance, a second transistor, a first capacitive impedance, a second gate voltage source, a third transistor, a third gate voltage source, a second capacitive impedance, a first impedance, a second impedance, a direct current source, a first output, a second output, a first resistor, a second resistor, a third resistor, a first bulk voltage source, a second bulk voltage source, and a third bulk voltage source.
Abstract translation: 低噪声放大器在高频操作下具有低噪声系数和高增益的特性。 低噪声放大器包括第一晶体管，第一电感阻抗，第一栅极电压源，匹配电路，输入端，第二电感阻抗，第二晶体管，第一电容阻抗，第二栅极电压源，第三晶体管 ，第三栅极电压源，第二电容性阻抗，第一阻抗，第二阻抗，直流源，第一输出，第二输出，第一电阻器，第二电阻器，第三电阻器，第一体电压源 ，第二体电压源和第三体电压源。
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3.发明申请Single-Ended Input to Differential-Ended Output Low Noise Amplifier Implemented with Cascode and Cascade Topology 有权差分输出的单端输入低噪声放大器用Cascode和Cascade拓扑实现公开(公告)号：US20070188238A1
公开(公告)日：2007-08-16
申请号：US11276830
申请日：2006-03-15
Applicant: Jiong-Guang Su , Tsyr-Shyang Liou , Ja-Hao Chen , Chih-Wei Chen , Shao-Hua Chen , Han-Hau Wu
Inventor： Jiong-Guang Su , Tsyr-Shyang Liou , Ja-Hao Chen , Chih-Wei Chen , Shao-Hua Chen , Han-Hau Wu
IPC: H03F3/45
CPC classification number: H03F1/26 , H03F3/45089 , H03F3/45183 , H03F2200/372 , H03F2200/534 , H03F2203/45316 , H03F2203/45332
Abstract: A low noise amplifier has the properties of low noise figure and high gain under a high-frequency operation. The low noise amplifier includes a first transistor, a first inductive impedance, a first gate voltage source, a matching circuit, an input, a second inductive impedance, a second transistor, a first capacitive impedance, a second gate voltage source, a third transistor, a third gate voltage source, a second capacitive impedance, a first impedance, a second impedance, a direct current source, a first output, a second output, a first resistor, a second resistor, a third resistor, a first bulk voltage source, a second bulk voltage source, and a third bulk voltage source.
Abstract translation: 低噪声放大器在高频操作下具有低噪声系数和高增益的特性。 低噪声放大器包括第一晶体管，第一电感阻抗，第一栅极电压源，匹配电路，输入端，第二电感阻抗，第二晶体管，第一电容阻抗，第二栅极电压源，第三晶体管 ，第三栅极电压源，第二电容性阻抗，第一阻抗，第二阻抗，直流源，第一输出，第二输出，第一电阻器，第二电阻器，第三电阻器，第一体电压源 ，第二体电压源和第三体电压源。
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公开(公告)号：US07912172B2
公开(公告)日：2011-03-22
申请号：US12480106
申请日：2009-06-08
Applicant: Han-Hau Wu
Inventor： Han-Hau Wu
IPC: H03K21/00
CPC classification number: H03K23/667 , H03K23/68
Abstract: A programmable divider apparatus comprises a first divider, a second divider, a feedback control unit, and a plurality of control signals. The first divider provides a frequency division operation of division by at least three integers, the second divider is cascaded to the first divider to provide a frequency division operation of division by two integers. The feedback control unit is coupled to between the first divider and the second divider to provide a feedback control signal to selectively supply an output of the second divider to an input of the first divider. The apparatus control signals and the feedback control signal are used to execute the first divider or the second divider.
Abstract translation: 一种可编程分频装置包括第一分频器，第二分频器，反馈控制单元和多个控制信号。 第一分频器提供除以至少三个整数的分频运算，第二分频器级联到第一分频器以提供除以两个整数的分频运算。 反馈控制单元耦合到第一分压器和第二分压器之间以提供反馈控制信号，以选择性地将第二分频器的输出提供给第一分频器的输入。 装置控制信号和反馈控制信号用于执行第一分频器或第二分频器。
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