摘要:
A dither circuit for reproducing a plurality of colors includes a latch having input terminals for receiving L input data bits and a clock signal, and having output terminals for outputting L output bits, a bit divider having input terminals for receiving the L output bits and a function selection signal, and having output terminals for outputting high M bits and low L-M bits, a function selector having an input terminal for receiving a low bit number signal and an output terminal for outputting a dither method signal, a frame rate and dither timing generator having a first input terminal for receiving the clock signal, a second input terminal for receiving a horizontal sync signal, a third input terminal for receiving a vertical sync signal and a fourth input terminal for receiving the dither method signal, and having output terminals for outputting dither timing bits, a frame rate dither controller having input terminals for receiving the low L-M bits and the dither timing bits, and an output terminal for outputting a dither data bit, and an adder having input terminals for receiving the dither data bit and the high M bits, and output terminals outputting for M output data bits.
摘要:
A liquid crystal monitor drive apparatus that is less vulnerable to EMI emissions and minimizes the manufacturing cost thereof includes a connector for inputting an analog graphic signal from a graphic card through a transmission cable, an analog-digital converter for converting the analog graphic signal from the connector into a digital graphic data, a scaler for scaling the definition of the digital graphic data from the analog-digital converter according to a liquid crystal panel, and a timing controller for driving the liquid crystal panel based on the digital graphic data from the scaler. At least two of the analog-digital converter, the scaler, and the timing controller are arranged in a unitary integrated circuit chip.
摘要:
An image control method and apparatus for a digital monitor that is capable of controlling a contrast and a color temperature in the digital monitor is disclosed. In the method, an offset control signal is produced. A digital input signal is added to the offset control signal. An added value of the digital input signal and the offset control signal is limited within a desired reference value. Accordingly, a contrast and a color temperature of the digital input signal can be controlled in the digital monitor.
摘要:
A dither circuit for reproducing multicolor data includes a latch for receiving 8 input data bits and a clock signal, and for separating the 8 input data bits into high 7 bits and a low bit; a frame rate generator for receiving a horizontal sync signal, a vertical sync signal and a clock signal, and for generating a frame rate bit, wherein the frame rate bit is toggled according to each cycle of the vertical sync signal; a frame rate controller for receiving the low bit from the latch and the frame rate bit from the frame rate generator, and generating a frame data; and an adder for receiving the frame data from the frame rate controller and the high 7 bits from the latch, and for generating 7 output data bits.
摘要:
A dither circuit and method for reproducing a multicolor image includes a latch having input terminals for 8 input data bits and clock signal, and output terminals for six high bits and two low bits of the input-data bits; a dither timing generator having input terminals for a horizontal sync signal, a vertical sync signal and a clock signal and output terminals for a first dither timing bit and the second dither timing bit, wherein the first dither timing bit is toggled according to each cycle of the horizontal sync signal and the second dither timing bit is toggled according to each cycle of the vertical sync signal; a dither data controlierhaving input terminals for the two low bits, the first and the second dither timing bits and an output terminal for applying four dither data bits generated using the two low bits and the first and the second dither timing bits sequentially; and an adder having an input terminal for the dither data bit and six high bits, and output terminals for six output data bits.