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    Block based design methodology
    6.
    发明授权
    Block based design methodology 有权
    基于块的设计方法

    公开(公告)号：US06269467B1

    公开(公告)日：2001-07-31

    申请号：US09410356

    申请日：1999-09-30

    申请人： Henry Chang ,  Larry Cooke ,  Merrill Hunt ,  Wuudiann Ke ,  Christopher K. Lennard ,  Grant Martin ,  Peter Paterson ,  Khoan Truong ,  Kumar Venkatramani

    发明人： Henry Chang ,  Larry Cooke ,  Merrill Hunt ,  Wuudiann Ke ,  Christopher K. Lennard ,  Grant Martin ,  Peter Paterson ,  Khoan Truong ,  Kumar Venkatramani

    IPC分类号： G06F1750

    CPC分类号： G06F17/5045 ,  G06F17/5022 ,  G06F2217/66

    摘要： A method and apparatus for designing a circuit system, including selecting a plurality of pre-designed circuit blocks to be used to design the circuit system, collecting data reflecting the experience of the designer regarding the pre-designed circuit blocks, the designer's experience being adaptable to a processing method, accepting or rejecting a design of the circuit system in a manner based on the designer's experience data and acceptable degree of risk, upon acceptance, forming block specifications containing criteria and modified constraints for each of the circuit blocks, upon acceptance, forming block specifications for deploying the circuit blocks on a floor plan of a chip, as a system on a chip, in compliance with the criteria and modified constraints, and substantially without changing the selected circuit block and the processing method.

    摘要翻译： 一种用于设计电路系统的方法和装置，包括选择要用于设计电路系统的多个预先设计的电路块，收集反映设计者关于预先设计的电路块的体验的数据，设计者的经验可适应 在接收时，基于设计者的经验数据和可接受的风险程度的方式接受或拒绝电路系统的设计，在接受时形成包含用于每个电路块的标准和修改的约束的块规格， 形成用于在芯片的平面图上布置电路块的块规格，作为芯片上的系统，符合标准和修改的约束，并且基本上不改变所选择的电路块和处理方法。

    Blocked based design methodology
    7.
    发明授权
    Blocked based design methodology 有权
    基于阻塞的设计方法

    公开(公告)号：US06725432B2

    公开(公告)日：2004-04-20

    申请号：US09754724

    申请日：2001-03-23

    申请人： Henry Chang ,  Larry Cooke ,  Merrill Hunt ,  Wuudiann Ke ,  Christopher K. Lennard ,  Grant Martin ,  Peter Paterson ,  Khoan Truong ,  Kumar Venkatramani

    发明人： Henry Chang ,  Larry Cooke ,  Merrill Hunt ,  Wuudiann Ke ,  Christopher K. Lennard ,  Grant Martin ,  Peter Paterson ,  Khoan Truong ,  Kumar Venkatramani

    IPC分类号： G06F1750

    CPC分类号： G06F17/5045 ,  G06F17/5022 ,  G06F2217/66

    摘要： A method and apparatus for designing a circuit system, including selecting a plurality of pre-designed circuit blocks to be used to design the circuit system, collecting data reflecting the experience of the designer regarding the pre-designed circuit blocks, the designer's experience being adaptable to a processing method, accepting or rejecting a design of the circuit system in a manner based on the designer's experience data and acceptable degree of risk, upon acceptance, forming block specifications containing criteria and modified constraints for each of the circuit blocks, upon acceptance, forming block specifications for deploying the circuit blocks on a floor plan of a chip, as a system on a chip, in compliance with the criteria and modified constraints, and substantially without changing the selected circuit block and the processing method.

    摘要翻译： 一种用于设计电路系统的方法和装置，包括选择要用于设计电路系统的多个预先设计的电路块，收集反映设计者关于预先设计的电路块的体验的数据，设计者的经验可适应 在接收时，基于设计者的经验数据和可接受的风险程度的方式接受或拒绝电路系统的设计，在接受时形成包含用于每个电路块的标准和修改的约束的块规格， 形成用于在芯片的平面图上布置电路块的块规格，作为芯片上的系统，符合标准和修改的约束，并且基本上不改变所选择的电路块和处理方法。

    Block based design methodology
    8.
    发明授权
    Block based design methodology 有权
    基于块的设计方法

    公开(公告)号：US06701504B2

    公开(公告)日：2004-03-02

    申请号：US09754653

    申请日：2001-01-04

    申请人： Henry Chang ,  Larry Cooke ,  Merrill Hunt ,  Wuudiann Ke ,  Christopher K. Lennard ,  Grant Martin ,  Peter Paterson ,  Khoan Truong ,  Kumar Venkatramani

    发明人： Henry Chang ,  Larry Cooke ,  Merrill Hunt ,  Wuudiann Ke ,  Christopher K. Lennard ,  Grant Martin ,  Peter Paterson ,  Khoan Truong ,  Kumar Venkatramani

    IPC分类号： G06F1750

    CPC分类号： G06F17/5045 ,  G06F17/5022 ,  G06F2217/66

    摘要： A method and apparatus for designing a circuit system, including selecting a plurality of pre-designed circuit blocks to be used to design the circuit system, collecting data reflecting the experience of the designer regarding the pre-designed circuit blocks, the designer's experience being adaptable to a processing method, accepting or rejecting a design of the circuit system in a manner based on the designer's experience data and acceptable degree of risk, upon acceptance, forming block specifications containing criteria and modified constraints for each of the circuit blocks, upon acceptance, forming block specifications for deploying the circuit blocks on a floor plan of a chip, as a system on a chip, in compliance with the criteria and modified constraints, and substantially without changing the selected circuit block and the processing method.

    摘要翻译： 一种用于设计电路系统的方法和装置，包括选择要用于设计电路系统的多个预先设计的电路块，收集反映设计者关于预先设计的电路块的体验的数据，设计者的经验可适应 在接收时，基于设计者的经验数据和可接受的风险程度的方式接受或拒绝电路系统的设计，在接受时形成包含用于每个电路块的标准和修改的约束的块规格， 形成用于在芯片的平面图上布置电路块的块规格，作为芯片上的系统，符合标准和修改的约束，并且基本上不改变所选择的电路块和处理方法。