System, method and computer program product for texture shading
    3.
    发明授权
    System, method and computer program product for texture shading 有权
    用于纹理阴影的系统,方法和计算机程序产品

    公开(公告)号:US07154507B1

    公开(公告)日:2006-12-26

    申请号:US10941198

    申请日:2004-09-15

    IPC分类号: G09G5/00

    CPC分类号: G06T15/04 G06T15/005

    摘要: A system, method and computer program product are provided for texture shading in a hardware graphics processor. Initially, a plurality of texture coordinates is identified. Further, it is determined whether a hardware graphics processor is operating in a texture shader mode. If the hardware graphics processor is operating in the texture shader mode, the texture coordinates are mapped to colors utilizing a plurality of texture shader stages in the hardware graphics processor. If, however, the hardware graphics processor is not operating in the texture shader mode, the texture coordinates are mapped to colors utilizing a conventional graphics application program interface (API) in conjunction with the hardware graphics processor.

    摘要翻译: 在硬件图形处理器中提供用于纹理着色的系统,方法和计算机程序产品。 首先,识别多个纹理坐标。 此外,确定硬件图形处理器是否以纹理着色器模式操作。 如果硬件图形处理器在纹理着色器模式下操作,则使用硬件图形处理器中的多个纹理着色器级将纹理坐标映射到颜色。 然而,如果硬件图形处理器不在纹理着色器模式下操作,则使用与硬件图形处理器结合的常规图形应用程序接口(API)将纹理坐标映射到颜色。

    System and method for reserving and managing memory spaces in a memory resource
    5.
    发明授权
    System and method for reserving and managing memory spaces in a memory resource 有权
    用于在内存资源中预留和管理内存空间的系统和方法

    公开(公告)号:US06950107B1

    公开(公告)日:2005-09-27

    申请号:US10726301

    申请日:2003-12-02

    IPC分类号: G06T1/60 G06F12/02

    CPC分类号: G06T1/60

    摘要: System and method for reserving a memory space for multithreaded processing is described. Memory space within a memory resource is allocated responsive to thread type. Examples of thread types for graphics processing include primitive, vertex and fragment types. Memory space allocated may be of a predetermined size for a thread type. Memory locations within a first memory space may be interleaved with memory locations within a second memory space.

    摘要翻译: 描述用于预留用于多线程处理的存储空间的系统和方法。 响应于线程类型分配内存资源内的内存空间。 用于图形处理的线程类型的示例包括原始,顶点和片段类型。 分配的内存空间可以是线程类型的预定大小。 第一存储器空间内的存储器位置可以与第二存储器空间内的存储器位置交错。

    System and method for reserving and managing memory spaces in a memory resource
    7.
    发明授权
    System and method for reserving and managing memory spaces in a memory resource 有权
    用于在内存资源中预留和管理内存空间的系统和方法

    公开(公告)号:US07233335B2

    公开(公告)日:2007-06-19

    申请号:US10419524

    申请日:2003-04-21

    CPC分类号: G06T1/60

    摘要: System and method for reserving a memory space for multithreaded processing is described. Memory space within a memory resource is allocated responsive to thread type. Examples of thread types for graphics processing include primitive, vertex and pixel types. Memory space allocated may be of a predetermined size for a thread type. Memory locations within a first memory space may be interleaved with memory locations within a second memory space.

    摘要翻译: 描述用于预留用于多线程处理的存储空间的系统和方法。 响应于线程类型分配内存资源内的内存空间。 用于图形处理的线程类型的示例包括原始,顶点和像素类型。 分配的内存空间可以是线程类型的预定大小。 第一存储器空间内的存储器位置可以与第二存储器空间内的存储器位置交错。

    Vertex processor with multiple interfaces
    8.
    发明授权
    Vertex processor with multiple interfaces 有权
    具有多个接口的顶点处理器

    公开(公告)号:US07151543B1

    公开(公告)日:2006-12-19

    申请号:US10704444

    申请日:2003-11-07

    IPC分类号: G09G5/39

    CPC分类号: G06T15/00 G06T2210/32

    摘要: Method and interface for sending vertex data output from a vertex processing unit to memory is described. Conventionally, the vertex data output is not output directly to memory via a dedicated write interface, but is instead passed through downstream computation units in a graphics processor and written to memory via the write interface normally used to write pixel data. When the downstream computation units are configured to pass the vertex data output through unmodified, processing of the vertex data output by the downstream computation units is deferred until a second pass through those units. When the vertex data output is output directly to memory, processing of the vertex data output by the downstream computation units can be initiated during a first pass through those units.

    摘要翻译: 描述从顶点处理单元向存储器输出顶点数据的方法和接口。 通常,顶点数据输出不通过专用写入接口直接输出到存储器,而是通过图形处理器中的下游计算单元传送,并通过通常用于写入像素数据的写入接口写入存储器。 当下游计算单元被配置为通过未修改的顶点数据输出传递时,由下游计算单元输出的顶点数据的处理被推迟到第二次通过这些单元。 当顶点数据输出被直接输出到存储器时,由下游计算单元输出的顶点数据的处理可以在首次通过这些单元时启动。