MATRIX TILING TO ACCELERATE COMPUTING IN REDUNDANT MATRICES

    公开(公告)号:US20200257653A1

    公开(公告)日:2020-08-13

    申请号:US16271638

    申请日:2019-02-08

    Inventor: SUHAS KUMAR RUI LIU

    Abstract: Systems and methods are provided for matrix tiling to accelerate computing in redundant matrices. The method may include identifying unique submatrices in the matrix; loading values of elements of each unique submatrix into a respective one of the array processors; applying the vector to inputs of each of the array processors; and adding outputs of the array processors according to locations of the unique submatrices in the matrix.

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