公开(公告)号：US20070284596A1

公开(公告)日：2007-12-13

申请号：US11755220

申请日：2007-05-30

申请人： Hideki YOSHINAGA ,  Hideo Mori

发明人： Hideki YOSHINAGA ,  Hideo Mori

IPC分类号： H01L33/00

CPC分类号： G02F1/136213 ,  G02F1/167 ,  H01L27/1255 ,  H01L27/3244

摘要： Provided is a novel structure of an active matrix TFT backplane. In order to form an auxiliary capacitor by a pixel electrode or a drain electrode of a TFT connected therewith, a base metal layer is formed on a glass substrate and a substrate insulating layer is formed on an entire surface thereof. By the structure, position alignment of the drain electrode with a counter electrode is unnecessary. An area for electrical capacitor formation is determined by size precision of the drain electrode, so a variation in electrical capacitance is suppressed to a small value.

摘要翻译： 提供了有源矩阵TFT背板的新颖结构。 为了通过与其连接的TFT的像素电极或漏极形成辅助电容器，在玻璃基板上形成基底金属层，并且在其整个表面上形成基板绝缘层。 通过该结构，不需要漏电极与对电极的位置对准。 用于形成电容器的区域由漏电极的尺寸精度确定，因此电容的变化被抑制到较小的值。