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公开(公告)号:US09047177B2
公开(公告)日:2015-06-02
申请号:US13609663
申请日:2012-09-11
申请人: Hiroki Matsudaira , Ryuji Nishikubo
发明人: Hiroki Matsudaira , Ryuji Nishikubo
CPC分类号: G06F12/0246 , G06F2212/401 , G06F2212/7201 , G06F2212/7207
摘要: According to one embodiment, a memory system includes a non-volatile memory, a volatile memory, a controller, and a compression/decompression processor. When data transmission is performed through the volatile memory between a host apparatus and the non-volatile memory, the controller updates management information stored in the volatile memory. In addition, the compression/decompression processor compresses the management information in the case where a first condition is satisfied, and decompresses the compressed management information in the case where a second condition is satisfied. The controller stores the compressed management information in the non-volatile memory.
摘要翻译: 根据一个实施例,存储器系统包括非易失性存储器,易失性存储器,控制器和压缩/解压缩处理器。 当通过主机设备和非易失性存储器之间的易失性存储器执行数据传输时,控制器更新存储在易失性存储器中的管理信息。 此外,在满足第一条件的情况下,压缩/解压缩处理器压缩管理信息,并且在满足第二条件的情况下解压缩压缩管理信息。 控制器将压缩的管理信息存储在非易失性存储器中。
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公开(公告)号:US20130246689A1
公开(公告)日:2013-09-19
申请号:US13609663
申请日:2012-09-11
申请人: Hiroki Matsudaira , Ryuji Nishikubo
发明人: Hiroki Matsudaira , Ryuji Nishikubo
IPC分类号: G06F12/02
CPC分类号: G06F12/0246 , G06F2212/401 , G06F2212/7201 , G06F2212/7207
摘要: According to one embodiment, a memory system includes a non-volatile memory, a volatile memory, a controller, and a compression/decompression processor. When data transmission is performed through the volatile memory between a host apparatus and the non-volatile memory, the controller updates management information stored in the volatile memory. In addition, the compression/decompression processor compresses the management information in the case where a first condition is satisfied, and decompresses the compressed management information in the case where a second condition is satisfied. The controller stores the compressed management information in the non-volatile memory.
摘要翻译: 根据一个实施例,存储器系统包括非易失性存储器,易失性存储器,控制器和压缩/解压缩处理器。 当通过主机设备和非易失性存储器之间的易失性存储器执行数据传输时,控制器更新存储在易失性存储器中的管理信息。 此外,在满足第一条件的情况下,压缩/解压缩处理器压缩管理信息,并且在满足第二条件的情况下解压缩压缩管理信息。 控制器将压缩的管理信息存储在非易失性存储器中。
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公开(公告)号:US09053007B2
公开(公告)日:2015-06-09
申请号:US13242482
申请日:2011-09-23
申请人: Ryuji Nishikubo
发明人: Ryuji Nishikubo
CPC分类号: G06F12/0246 , G06F2212/7201
摘要: According to one embodiment, a memory system includes nonvolatile memory and storage unit storing a translation table indicating, by a predetermined management unit, relationships between logical addresses specified by a host and physical addresses in the nonvolatile memory. A memory system of the embodiment includes a controller that when receiving from the host a delete notification indicating a delete area smaller than the management unit specified by a logical address, write a specified data pattern to an area of the nonvolatile memory having a physical address corresponding to the delete area.
摘要翻译: 根据一个实施例,存储器系统包括非易失性存储器和存储单元,其存储由预定管理单元指示由主机指定的逻辑地址与非易失性存储器中的物理地址之间的关系的转换表。 该实施例的存储器系统包括控制器,当从主机接收到指示比由逻辑地址指定的管理单元小的删除区域的删除通知时,将指定的数据模式写入具有物理地址对应的非易失性存储器的区域 到删除区域。
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4.
公开(公告)号:US20120254514A1
公开(公告)日:2012-10-04
申请号:US13242482
申请日:2011-09-23
申请人: Ryuji Nishikubo
发明人: Ryuji Nishikubo
IPC分类号: G06F12/00
CPC分类号: G06F12/0246 , G06F2212/7201
摘要: According to one embodiment, a memory system includes nonvolatile memory and storage unit storing a translation table indicating, by a predetermined management unit, relationships between logical addresses specified by a host and physical addresses in the nonvolatile memory. A memory system of the embodiment includes a controller that when receiving from the host a delete notification indicating a delete area smaller than the management unit specified by a logical address, write a specified data pattern to an area of the nonvolatile memory having a physical address corresponding to the delete area.
摘要翻译: 根据一个实施例,存储器系统包括非易失性存储器和存储单元,其存储由预定管理单元指示由主机指定的逻辑地址与非易失性存储器中的物理地址之间的关系的转换表。 该实施例的存储器系统包括控制器,当从主机接收到指示比由逻辑地址指定的管理单元小的删除区域的删除通知时,将指定的数据模式写入具有物理地址对应的非易失性存储器的区域 到删除区域。
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