公开(公告)号：US08624242B2

公开(公告)日：2014-01-07

申请号：US13711169

申请日：2012-12-11

申请人： Hiroshi Kojima ,  Fumio Marutani

发明人： Hiroshi Kojima ,  Fumio Marutani

IPC分类号： H01L23/52

CPC分类号： H01L22/30 ,  H01L22/34 ,  H01L2924/0002 ,  H01L2924/00

摘要： There is offered a semiconductor integrated circuit provided with a function to electrically identify a location where a defect such as chipping of an LSI die or separation of resin is caused. Corresponding to each of the four corners of a semiconductor substrate, each of L-shaped first through fourth peripheral wirings having a first end and a second end is disposed on a periphery of the semiconductor substrate. The first end of each of the first through fourth peripheral wirings is connected with a power supply wiring. Each of first through fourth detection circuits detects breaking of corresponding each of the first through fourth peripheral wirings in response to a voltage at the second end of corresponding each of the first through fourth peripheral wirings, and outputs corresponding each of first through fourth detection signals to corresponding each of output pads.

摘要翻译： 提供了一种半导体集成电路，其具有电识别出现诸如LSI裸片碎裂或树脂分离等缺陷的位置的功能。 对应于半导体衬底的四个角中的每一个，具有第一端和第二端的L形第一至第四外围布线中的每一个设置在半导体衬底的周围。 第一至第四外围布线中的每一个的第一端与电源布线连接。 第一至第四检测电路中的每一个响应于第一至第四外围配线中的每一个的第二端的电压，检测相应的第一至第四外围配线中的每一个的断开，并且将第一至第四检测信号中的每一个相对应地输出到 对应每个输出垫。