公开(公告)号：US4707622A

公开(公告)日：1987-11-17

申请号：US815061

申请日：1985-12-31

申请人： Hisoka Takao ,  Toshiro Sato ,  Seiichi Saito ,  Toshinari Hayashi

发明人： Hisoka Takao ,  Toshiro Sato ,  Seiichi Saito ,  Toshinari Hayashi

IPC分类号： H03K19/0944 ,  H03K19/0952 ,  H03K19/094

CPC分类号： H03K19/09443 ,  H03K19/0952

摘要： A logic circuit includes an inverter circuit including a first enhancement type field effect transistor having a gate connected to an input, and a first depletion type transistor having a gate and a source which are directly connected to a drain of the first enhancement type field effect transistor. A source follower circuit including a second enhancement type field effect transistor having a gate is connected to a connecting point of the first enhancement type field effect transistor and the first depletion type field effect transistor. A second depletion type field effect transistor having a gate and a source which are directly connected to each other has a drain which is connected to a source of the second enhancement type field effect transistor. A first power source is connected to the drains of the first depletion type field effect transistor and the second enhancement type field effect transistor and a second power source is connected to the sources of the first enhancement type field effect transistor and the second depletion type field effect transistor. An output is formed at the connecting point of the second enhancement type field effect transistor and the second depletion type field effect type transistor.

摘要翻译： 逻辑电路包括反相器电路，其包括具有连接到输入端的栅极的第一增强型场效应晶体管和具有栅极和源极的第一耗尽型晶体管，其直接连接到第一增强型场效应晶体管的漏极 。 包括具有栅极的第二增强型场效应晶体管的源极跟随器电路连接到第一增强型场效应晶体管和第一耗尽型场效应晶体管的连接点。 具有彼此直接连接的栅极和源极的第二耗尽型场效应晶体管具有连接到第二增强型场效应晶体管的源极的漏极。 第一电源连接到第一耗尽型场效应晶体管和第二增强型场效应晶体管的漏极，第二电源连接到第一增强型场效应晶体管的源极和第二衰减型场效应 晶体管。 在第二增强型场效应晶体管和第二耗尽型场效应晶体管的连接点处形成输出。