M-level diode junction temperature measurement method cancelling series and parallel parasitic influences

    公开(公告)号:US06554470B2

    公开(公告)日:2003-04-29

    申请号:US10045115

    申请日:2001-10-26

    IPC分类号: G01K701

    CPC分类号: G01K7/01

    摘要: The present invention provides an improved method and apparatus to measure p-n junction device temperature by testing a device with M-Levels of applied collector current, sensing changes in output characteristics, and calculating the device current offset error and leakage current error due to parasitic parallel resistance where the leakage current error due to parasitic parallel resistance may be treated and eliminated as current offset error. Application of M levels of excitation values, where M is greater than or equal to four, eliminates device series parasitic effects, comprised of voltage offset and a series parasitic resistance, and parallel parasitic effects, comprised of current offset error and leakage current error due to parasitic parallel resistance, from temperature measurements. Since the operating characteristics of the device are temperature dependent, excitation levels applied and output values observed are used to determine junction temperature of the device free of series and parallel parasitic effects.