GROUNDING STRUCTURE
    1.
    发明申请
    GROUNDING STRUCTURE 有权
    接地结构

    公开(公告)号:US20100225840A1

    公开(公告)日:2010-09-09

    申请号:US12560570

    申请日:2009-09-16

    IPC分类号: G02F1/1333

    摘要: A grounding structure for a display device is provided. The grounding structure includes a substrate, a first connecting pad, a second connecting pad, a connecting structure and a grounding line. The first and second connecting pads are disposed on the substrate. The connecting structure electrically connects the first and second connecting pads. The first grounding line is disposed on the substrate, and has a length larger than two thirds of the projected length of the connecting structure on the surface of the substrate.

    摘要翻译: 提供了一种用于显示装置的接地结构。 接地结构包括基板,第一连接焊盘,第二连接焊盘,连接结构和接地线。 第一和第二连接焊盘设置在基板上。 连接结构电连接第一和第二连接焊盘。 第一接地线设置在基板上,并且其长度大于基板表面上的连接结构的突出长度的三分之二。

    ARRAY SUBSTRATE FOR FFS TYPE LCD PANEL AND METHOD FOR MANUFACTURING THE SAME
    2.
    发明申请
    ARRAY SUBSTRATE FOR FFS TYPE LCD PANEL AND METHOD FOR MANUFACTURING THE SAME 有权
    用于FFS型LCD面板的阵列基板及其制造方法

    公开(公告)号:US20100259714A1

    公开(公告)日:2010-10-14

    申请号:US12696690

    申请日:2010-01-29

    IPC分类号: G02F1/1343 G02F1/13

    摘要: An array substrate for FFS type LCD panel includes a transparent substrate, gate lines, a gate insulating layer, data lines, pixel electrodes, a passivation layer and a common electrode. The gate lines are disposed on the transparent substrate. The gate insulating layer is disposed on the transparent substrate and covers the gate lines. The data lines are disposed on the gate insulating layer. The pixel electrodes are disposed on the gate insulating layer, wherein the pixel electrodes and the data lines are located on the same level. The passivation layer is disposed on the gate insulating layer and covers the pixel electrodes and the data lines. The common electrode is disposed on the passivation layer.

    摘要翻译: 用于FFS型LCD面板的阵列基板包括透明基板,栅极线,栅极绝缘层,数据线,像素电极,钝化层和公共电极。 栅极线设置在透明基板上。 栅极绝缘层设置在透明基板上并覆盖栅极线。 数据线设置在栅极绝缘层上。 像素电极设置在栅绝缘层上,其中像素电极和数据线位于相同的电平上。 钝化层设置在栅极绝缘层上并覆盖像素电极和数据线。 公共电极设置在钝化层上。