公开(公告)号：US20220035763A1

公开(公告)日：2022-02-03

申请号：US17390365

申请日：2021-07-30

Applicant: Huawei Technologies Co., Ltd.

Inventor： Junhong Huang ,  Zhaojun He ,  Fan Wang

IPC: G06F13/40 ,  G06F9/48 ,  G06F9/50 ,  G06F13/36 ,  H03M13/11

Abstract: A chip includes a dedicated scheduler, a general scheduler, and a plurality of hardware accelerators. The hardware accelerators are connected, at least one hardware accelerator is connected to the dedicated scheduler, and at least one hardware accelerator is connected to the general scheduler.

公开(公告)号：US11586574B2

公开(公告)日：2023-02-21

申请号：US17390365

申请日：2021-07-30

Applicant: Huawei Technologies Co., Ltd.

Inventor： Junhong Huang ,  Zhaojun He ,  Fan Wang

IPC: G06F9/48 ,  G06F13/40 ,  G06F9/50 ,  G06F13/36 ,  H03M13/11

Abstract: A chip includes a dedicated scheduler, a general scheduler, and a plurality of hardware accelerators. The hardware accelerators are connected, at least one hardware accelerator is connected to the dedicated scheduler, and at least one hardware accelerator is connected to the general scheduler.