Security Isolation Apparatus and Method
    1.
    发明公开

    公开(公告)号:US20230342503A1

    公开(公告)日:2023-10-26

    申请号:US18344404

    申请日:2023-06-29

    CPC classification number: G06F21/74 G06F21/52 G06F21/572

    Abstract: A system includes a first subsystem and a second subsystem that are used in a same chip. A security level of a first physical resource included in the first subsystem is higher than a security level of a second physical resource included in the second subsystem. The first subsystem includes an interrupt controller, and the interrupt controller is configured to manage an interrupt of a peripheral of the second subsystem. Embodiments of this application are for isolation between subsystems of different security levels in a chip.

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