TRANSISTOR-OUTLINE PACKAGE AND PREPARATION METHOD THEREOF, OPTICAL SUB-ASSEMBLY, OPTICAL MODULE, AND OPTICAL NETWORK SYSTEM

    公开(公告)号:US20240201457A1

    公开(公告)日:2024-06-20

    申请号:US18593421

    申请日:2024-03-01

    CPC classification number: G02B6/4215 G02B6/4239 G02B6/4244 G02B6/4263

    Abstract: Embodiments include transistor-outline packages, methods, optical sub-assemblies, and optical modules associated therewith. In some embodiments a transistor-outline package includes a transistor base, a transistor cap, a first lens, a light filtering assembly, a lens assembly, a first optical receiving chip, and a second optical receiving chip. The transistor base and the transistor cap are fastened to form an accommodation cavity. The first lens is disposed on the transistor cap, and the first optical receiving chip and second optical receiving chip are disposed on the transistor base. The lens assembly includes a second lens and a third lens. The light filtering assembly is disposed between the first lens and the lens assembly. The transistor-outline package receives and collimates a first light ray by using the first lens on the transistor cap, and the light filtering assembly splits the first light ray into a second light ray and a third light ray.

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