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公开(公告)号:US20200242072A1
公开(公告)日:2020-07-30
申请号:US16722082
申请日:2019-12-20
Inventor: Xiaofei LIAO , Hai JIN , Long ZHENG , Chengbo YANG
IPC: G06F15/76 , G06F16/901
Abstract: An FPGA-based graph data processing method is provided for executing graph traversals on a graph having characteristics of a small-world network by using a first processor being a CPU and a second processor that is a FPGA and is in communicative connection with the first processor, wherein the first processor sends graph data to be traversed to the second processor, and obtains result data of the graph traversals from the second processor for result output after the second processor has completed the graph traversals of the graph data by executing level traversals, and the second processor comprises a sparsity processing module and a density processing module, the sparsity processing module operates in a beginning stage and/or an ending stage of the graph traversals, and the density processing module with a higher degree of parallelism than the sparsity processing module operates in the intermediate stage of the graph traversals.