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公开(公告)号:US3534264A
公开(公告)日:1970-10-13
申请号:US3534264D
申请日:1966-04-15
Applicant: IBM
Inventor: BLASBALG HERMAN L , HAYASE JOSHUA Y , CRUTCHFIELD RICHARD C JR , NAJJAR HANN F
CPC classification number: G06F3/00 , H04J3/07 , H04J3/1647 , H04J3/1682 , H04L1/0002 , H04L1/0009 , H04L1/0017 , H04L1/0025 , H04L1/0052 , H04L1/0057 , H04L1/12 , H04L2001/0098
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公开(公告)号:US3700820A
公开(公告)日:1972-10-24
申请号:US3700820D
申请日:1969-03-18
Applicant: IBM
Inventor: BLASBALG HERMAN L , HAYASE JOSHUA Y , CRUTCHFIELD RICHARD C JR , NAJJAR HANN F
CPC classification number: H04L1/0009 , G06F3/00 , H04J3/07 , H04J3/1647 , H04J3/1682 , H04L1/0002 , H04L1/0017 , H04L1/0025 , H04L1/0052
Abstract: An adaptive digital multiplexer including a multiplex format computer, a time slot generator, and a combiner. The format computer determines the number of time slots required within a time frame and assigns input signals to time slots according to the information rate and priority of each input signal. Assignments are made such that transmission of lower priority input signals are interleaved between transmission of higher priority signals thereby allowing the multiplexed output to be adapted to a reduced transmission rate of increased bit duration by progressively eliminating transmission of lower priority signals.
Abstract translation: 一种包括多路复用格式计算机,时隙发生器和组合器的自适应数字多路复用器。 格式计算机确定时间段内所需的时隙数,并根据每个输入信号的信息速率和优先级将输入信号分配给时隙。 进行分配,使得较低优先级输入信号的传输在较高优先级信号的传输之间进行交织,从而允许多路复用输出通过逐渐消除较低优先级信号的传输而适应于增加的比特持续时间的降低的传输速率。
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