Abstract:
A processor for encoding fixed-length code words into variablelength code words and for decoding variable-length code words into fixed-length code words. The fixed-length code words are assigned to a number of groups and one of several possible coding sets determined by the probability of each word occurring after a preceding word. Each of the fixed-length code words is stored in a first associative memory unit along with its group number, its coding set assignment and a number of addresses arranged in groups. An input fixed-length code word is compared in the memory and will match the corresponding fixed-length stored word. One of the addresses is read out of the memory. The particular group from which the address is read out is determined by the group number of the previously received fixed-length code word. The selected address that is read out and the coding set membership, number of the previous word is entered into a second associative memory containing all the addresses arranged in several coding sets along with the variable-length code words. A match in the second memory unit on an address and a coding set number produces a variable-length code word for the input fixed-length code word. The first memory unit also provides the group number and coding set number for the next input fixed-length code word to be encoded. Decoding is performed in a similar but reverse manner starting with the variable-length coded data being entered into the second memory.
Abstract:
The present invention relates to a method practiceable on a general purpose electronic computer for statistically analyzing a data set and for producing a set of encoding and decoding (E/D) tables for achieving compaction of the original data set utilizing a variable length code. The method disclosed may operate under constraints of available core, desired compaction rate and speed of compaction/decompaction to produce differing sets of encoding/decoding tables depending upon the constraints imposed. The method would most normally be provided and utilized as a software package wherein the primary inputs are the data set itself and the above enumerated constraints. By utilizing a variable-length code wherein the code assignment is dependent upon the characteristic of preceding data good compaction rates may be achieved utilizing reasonable amounts of memory for the E/D tables. The method comprises three principle steps. The first is the construction of a matrix showing the probability of occurrence of every member of the data set with respect to the immediately preceding member. The second step comprises grouping various rows or columns of this matrix having similar probabilities of occurrence, the third step comprises a reordering of all of the previously grouped rows or columns and finally a second clustering into coding sets may be performed.
Abstract:
This code conversion method enables data which has been coded in the form of variable-length bit strings for data compaction purposes to be processed by hardware units of conventional design that handle data in the form of fixed-length bit strings. The coding scheme is such that in the bit string of each variablelength code whose length exceeds a certain fixed number of bits N, the first N bits constitute a ''''length prefix'''' which uniquely designates the code length. This N-bit prefix is decoded by a first decoding table to give a base address in a second decoding table. The remaining bits of the variable-length code, whose number is known from the length prefix, then are decoded to give a displacement value relative to the base address for locating the address at which the decoded fixed-length word is found. Concurrently with the execution of this second decoding step, the first step in the decoding of the next variable-length code is performed. If a variable-length code does not have more than N bits, it is decoded in one step by the first decoding table, which stores the decoded word at every address therein which may be designated by all possible N-bit combinations containing the aforesaid variable-length code as their leading portion. A length indication read out of the first table then shifts the address register contents by an appropriate amount to bring the next succeeding variable-length code into the leading position therein.
Abstract:
A pattern recognition system is disclosed which will recognize patterns irrespective of their translation rotation or scale change. Input data may be provided by a scanner or other suitable data source. Means for calculating the center of gravity, or alternatively the autocorrelation function are provided which can be employed; and then the data can be transformed for an actual or simulated annular or equivalently radial scan, with exponential spacing along radii. Alternatively, a straightforward raster scan may be employed for recognition which is invarient to translation only. The output is then processed in means for cross correlating with known patterns. The result is preferably raised to the Nth power and summed. Alternatively, 2 can be raised to the power of the cross correlation times K and summed which is easily done on a digital computer, or finally the result can be subjected to maximum operation. In all cases, the pattern is then processed through corresponding means for normalization including a storage device, a multiplier and a decision function unit. Prior to operation for pattern recognition, the system is operated with the normalization storage connected through an inverter to the output of one of the Nth power, power of 2 or maximum operation units for receiving the appropriately processed data relative to a sample for normalization. Then the appropriate normalization may be supplied for each mode of processing after cross correlation.
Abstract:
A three-state associative memory is employed as an encodingdecoding instrumentality for making conversions between fixedlength codes and variable-length codes. During the encoding process, associations are performed upon fixed-length codes to find the corresponding variable-length codes. The shorter-length codes are assigned to the most frequently occurring words or bytes for achieving a minimum average code length. The available variable-length codes are stored in a field of the associative memory that has uniform word lengths. Memory cells which are not needed for storing bits of the variable-length codes are set to a ''''don''t care'''' state. During each readout of a variable-length code, a corresponding ''''length'''' value is read out of the memory to indicate the number of valid bits that are to be read serially from the data register, excluding the ''''don''t cares.'''' During the decoding process, the bits of successive variable-length codes are fed serially to an argument register, and as each association is performed upon a variable-length code to find the corresponding fixed-length code, the ''''length'''' field indicates the number of bit positions by which the contents of the argument register are to be shifted for bringing the next variable-length code bit string into registry.
Abstract:
A three-state associative memory is employed as an encodingdecoding instrumentality for making conversions between fixedlength codes and variable-length codes. The available variablelength codes are stored in a field of the associative memory that has uniform word lengths. Memory cells which are not needed for storing bits of the variable-length codes are set to a ''''don''t care'''' state. Fixed-length codes and code length indications corresponding to these stored variable-length codes are stored in other fields of the associative memory. A ''''COPY'''' feature enables the system to function with an associative memory of relatively small size which performs normal encoding and decoding operations for the more frequently occurring codes, thereby achieving a high degree of data compaction, while the less frequently occurring codes are handled in a manner that does not achieve such compaction but requires much less memory. Encoding in the ''''COPY'''' mode of operation involves appending the fixedlength code word to a special COPY code which is the same for all code words in this category. Decoding a combination code word of this kind involves discarding the COPY code portion and directly utilizing the remainder as the decoded fixed-length code word. Only one line of stored data is needed in the associative memory to handle all code words which use the COPY code.