公开(公告)号：US20200185031A1

公开(公告)日：2020-06-11

申请号：US16703319

申请日：2019-12-04

Applicant: INDUSTRY-ACADEMIC COOPERATION FOUNDATION CHOSUN UNIVERSITY

Inventor： Jeong A LEE ,  Inayat ULLAH ,  Zahid ULLAH

IPC: G11C15/04 ,  H03K19/1776 ,  H03K19/17728

Abstract: According to an embodiment of the present invention, there is provided a TCAM architecture in which a content-based search is conductible in such a manner that a search key to be searched for is used as an address of a memory element that makes up a TCAM cell and that an output from the memory element reflects whether a match or a mismatch is found as a result of the search. The memory element may be a look-up table.

公开(公告)号：US20170063403A1

公开(公告)日：2017-03-02

申请号：US15247185

申请日：2016-08-25

Applicant: INDUSTRY-ACADEMIC COOPERATION FOUNDATION CHOSUN UNIVERSITY

Inventor： Jeong A LEE ,  Hossein Moradian

IPC: H03M13/00

CPC classification number: G06F11/10

Abstract: Disclosed are a fault-localization and error-correction method for a self-checking binary signed-digit adder and a digital logic circuit for performing the method. More specifically, a fault-localization and error-correction method for a self-checking binary signed-digit adder in which a stuck-at fault of the self-checking binary signed-digit adder may be detected at low cost and with low complexity and in which an error may be autonomously corrected using the self-dual concept, and a digital logic circuit for performing the method are disclosed.

Abstract translation: 公开了用于自检二进制有符号位加法器和用于执行该方法的数字逻辑电路的故障定位和纠错方法。 更具体地说，用于自检二进制有符号位加法器的故障定位和纠错方法，其中可以以低成本和低复杂度检测出自检二进制有符号位加法器的卡入故障， 其中可以使用自双重概念自主地校正错误，并且公开了用于执行该方法的数字逻辑电路。