公开(公告)号：US11100993B2

公开(公告)日：2021-08-24

申请号：US16703319

申请日：2019-12-04

Applicant: INDUSTRY-ACADEMIC COOPERATION FOUNDATION CHOSUN UNIVERSITY

Inventor： Jeong A Lee ,  Inayat Ullah ,  Zahid Ullah

IPC: G11C15/00 ,  G11C15/04 ,  H03K19/17728 ,  H03K19/1776

Abstract: According to an embodiment of the present invention, there is provided a TCAM architecture in which a content-based search is conductible in such a manner that a search key to be searched for is used as an address of a memory element that makes up a TCAM cell and that an output from the memory element reflects whether a match or a mismatch is found as a result of the search. The memory element may be a look-up table.

公开(公告)号：US10133624B2

公开(公告)日：2018-11-20

申请号：US15247185

申请日：2016-08-25

Applicant: INDUSTRY-ACADEMIC COOPERATION FOUNDATION CHOSUN UNIVERSITY

Inventor： Jeong A Lee ,  Hossein Moradian

IPC: G06F11/30 ,  G08C25/00 ,  H03M13/00 ,  G06F11/10

Abstract: Disclosed are a fault-localization and error-correction method for a self-checking binary signed-digit adder and a digital logic circuit for performing the method. More specifically, a fault-localization and error-correction method for a self-checking binary signed-digit adder in which a stuck-at fault of the self-checking binary signed-digit adder may be detected at low cost and with low complexity and in which an error may be autonomously corrected using the self-dual concept, and a digital logic circuit for performing the method are disclosed.