公开(公告)号：US20190334746A1

公开(公告)日：2019-10-31

申请号：US16312686

申请日：2017-06-14

Applicant: INTEL CORPORATION

Inventor： Bernard ARAMBEPOLA ,  Thushara HEWAVITHANA

IPC: H04L25/08 ,  H04B1/10 ,  H04L5/00 ,  H04L7/00

Abstract: Symbols are received on a downstream channel. A value of a channel synchronization parameter is determined based on the received symbols. An interference event on the downstream channel is detected. In response to detecting the interference event: an output signal is determined based on at least one cached value of the channel synchronization parameter, the at least one cached value being determined based on symbols received prior to and offset from said detecting of the interference event.

公开(公告)号：US20220321316A1

公开(公告)日：2022-10-06

申请号：US17808123

申请日：2022-06-22

Applicant: Intel Corporation

Inventor： David BARR ,  Bernard ARAMBEPOLA

IPC: H04L5/14 ,  H04L12/28 ,  H04B3/02 ,  H04B3/32 ,  H04L65/1101

Abstract: A head-end equipment associated with a communication system configured to interface with an interference group (IG) composed of two or more modems is disclosed. The head-end equipment comprises a memory configured to store a plurality of instructions; and one or more processors configured to retrieve the plurality of instructions from the memory. In some embodiments, the one or more processors, upon execution of the plurality of instructions from the memory, is configured to generate an advanced warning signal to be provided to one or more modems associated with the IG. In some embodiments, the advanced warning signal comprises an information that a select modem, different from the one or more modems, in the IG will be initiating an upstream communication in a select frequency band, as well as information on a start time and a duration of the upstream communication.