公开(公告)号：US20190146791A1

公开(公告)日：2019-05-16

申请号：US16246438

申请日：2019-01-11

Applicant: INTEL CORPORATION

Inventor： Terence SYCH ,  Elmoustapha OULD-AHMED-VALL

IPC: G06F9/30 ,  G06F12/0875

Abstract: Instructions and logic provide SIMD vector population count functionality. Some embodiments store in each data field of a portion of n data fields of a vector register or memory vector, at least two bits of data. In a processor, a SIMD instruction for a vector population count is executed, such that for that portion of the n data fields in the vector register or memory vector, the occurrences of binary values equal to each of a first one or more predetermined binary values, are counted and the counted occurrences are stored, in a portion of a destination register corresponding to the portion of the n data fields in the vector register or memory vector, as a first one or more counts corresponding to the first one or more predetermined binary values.