公开(公告)号：US3735045A

公开(公告)日：1973-05-22

申请号：US3735045D

申请日：1970-08-24

Applicant: ITT CORP NUTLEY

Inventor： CLARK J

IPC: H04J3/06 ,  H04L7/08

CPC classification number: H04J3/06

Abstract: A framing control circuit for a frame synchronization system employing one integrator for both the sense and search modes rather than a separate integrator for each of the sense and search modes. A voltage controlled amplitude control circuit is disposed at the input to the integrator. The control signal for the control circuit is produced by a bistable device coupled to the output of the integrator. A low binary control signal, indicating a sense mode, provides a relatively low amplitude input signal to the integrator and, hence, an effective long time constant for the integrator. A high binary control signal, indicating a search mode, provides a relatively large amplitude input signal to the integrator and, hence, an effective short time constant for the integrator.

Abstract translation: 用于帧同步系统的成帧控制电路，其对于感测和搜索模式都采用一个积分器，而不是针对每个感测和搜索模式的单独的积分器。 压控幅度控制电路设置在积分器的输入端。 用于控制电路的控制信号由耦合到积分器的输出的双稳态器件产生。 指示感测模式的低二进制控制信号向积分器提供相对较低的振幅输入信号，因此为积分器提供有效的长时间常数。 指示搜索模式的高二进制控制信号向积分器提供相对较大的幅度输入信号，因此为积分器提供有效的短时间常数。