公开(公告)号：US11626870B1

公开(公告)日：2023-04-11

申请号：US17573490

申请日：2022-01-11

Applicant: Infineon Technologies Austria AG

Inventor： Mi Ran Baek ,  Junbae Lee

IPC: H03K17/082

Abstract: A circuit comprises a gate driver having a supply voltage terminal and configured to generate an output at an output terminal based on an input. A voltage multiplexer is configured to connect a first voltage terminal to the supply voltage terminal responsive to a voltage select signal having a first value and connect a second voltage terminal to the supply voltage terminal responsive to the voltage select signal having a second value. First logic is configured to generate a fault signal responsive to detecting one of a first fault condition associated with operation of the gate driver or a second fault condition associated with operation of the gate driver and generate the voltage select signal having the second value based on the fault signal. Second logic is configured to generate the voltage select signal having the second value after a predetermined delay period based on a value of the input.