公开(公告)号：US20180189065A1

公开(公告)日：2018-07-05

申请号：US15396345

申请日：2016-12-30

Applicant: Intel Corporation

Inventor： KARTHIK RAMAN ,  ARIEL SLONIM ,  ADY TAL

IPC: G06F9/30 ,  G06F9/38

CPC classification number: G06F9/30014 ,  G06F9/30065 ,  G06F9/30072 ,  G06F11/30

Abstract: An apparatus and method are described for floating point operation (FLOP) accounting. For example, one embodiment of a processor comprises: an instruction fetch unit to fetch instructions from system memory, the instructions including at least one masked vector floating point instruction to perform operations on a plurality of floating point data elements; a mask register to store a mask value associated with the masked vector floating point instruction; a decoder to decode the masked vector floating point instruction; and floating point operations (FLOP) accounting circuitry to read the mask register to determine a number of floating point operations to be performed during execution of the masked vector floating point instruction.