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公开(公告)号:US20230169173A1
公开(公告)日:2023-06-01
申请号:US18088730
申请日:2022-12-26
Applicant: Intel Corporation
Inventor: Aditya Katragada , Prashant Dewan , Karunakara Kotary , Vinupama Godavarthi , Kumar Dwarakanath , Alex Izbinsky , Purushottam Goel
CPC classification number: G06F21/572 , G06F21/72 , G06F9/445 , G06F2221/033
Abstract: An integrated circuit provides a firmware dashboard to communicatively couple to a basic input/output system (BIOS), and provide to the BIOS a firmware load interface, and an intellectual property (IP) block interface to communicatively couple to an IP block, wherein the IP block provides a push model to load a firmware or a pull model to load the firmware, and wherein the firmware dashboard provides a common load flow to the BIOS for both the push model and pull model.
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公开(公告)号:US11550917B2
公开(公告)日:2023-01-10
申请号:US16457184
申请日:2019-06-28
Applicant: Intel Corporation
Inventor: Aditya Katragada , Prashant Dewan , Karunakara Kotary , Vinupama Godavarthi , Kumar Dwarakanath , Alex Izbinsky , Purushottam Goel
Abstract: There is disclosed in one example, a system-on-a-chip (SoC), including: a processor core; a fabric; an intellectual property (IP) block communicatively coupled to the processor core via the fabric, the IP block having a microcontroller configured to provide a microcontroller architecture; a firmware load interface configured to provide a standardized hardware interface to the microcontroller architecture, wherein the standardized hardware interface provides an architecture-agnostic mechanism to securely load a firmware to the intellectual property block; and logic to provide a loader to load a firmware to the IP block via the firmware load interface.
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