公开(公告)号：US11695051B2

公开(公告)日：2023-07-04

申请号：US16369517

申请日：2019-03-29

Applicant: Intel Corporation

Inventor： Ashish Penumatcha ,  Seung Hoon Sung ,  Scott Clendenning ,  Uygar Avci ,  Ian A. Young ,  Jack T. Kavalieros

IPC: H01L29/423 ,  H01L29/78 ,  H01L29/66

CPC classification number: H01L29/42364 ,  H01L29/42376 ,  H01L29/6656 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785

Abstract: Embodiments herein describe techniques for a semiconductor device including a substrate and a FinFET transistor on the substrate. The FinFET transistor includes a fin structure having a channel area, a source area, and a drain area. The FinFET transistor further includes a gate dielectric area between spacers above the channel area of the fin structure and below a top surface of the spacers; spacers above the fin structure and around the gate dielectric area; and a metal gate conformally covering and in direct contact with sidewalls of the spacers. The gate dielectric area has a curved surface. The metal gate is in direct contact with the curved surface of the gate dielectric area. Other embodiments may be described and/or claimed.