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公开(公告)号：US20250110876A1
公开(公告)日：2025-04-03
申请号：US18477207
申请日：2023-09-28
Applicant: Intel Corporation
Inventor： Ashmita Sinha , Joseph Nuzman
IPC: G06F12/0811
Abstract: Techniques for dynamic cache fill prioritization are described. In an embodiment, an apparatus includes a cache at a mid-level of a cache hierarchy; and a mid-level cache (MLC) unit including the cache, a local queue to store MLC lookup requests, an external queue to store MLC fill requests, and an MLC access control hardware. The MLC access control hardware is to dynamically switch prioritization of servicing the MLC lookup requests versus servicing the MLC fill requests.
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