公开(公告)号：US10541190B2

公开(公告)日：2020-01-21

申请号：US15769705

申请日：2015-11-30

Applicant: Intel Corporation

Inventor： Chandra Jha ,  Eric Li

IPC: H01L23/433 ,  H01L23/24 ,  H01L23/31 ,  H01L23/367 ,  H01L23/373

Abstract: An apparatus is described that includes a first semiconductor die. A second semiconductor die is stacked on the first semiconductor die. The first semiconductor die has a larger surface area than the second semiconductor die such that there exists a peripheral region of the first semiconductor die that is not covered by the second semiconductor die. The apparatus includes thermally conductive material above the second semiconductor die. The apparatus includes a compound mold between the thermally conductive material and both the second semiconductor die and the peripheral region of the first semiconductor die. The apparatus includes a thermally conductive structure extending through the compound mold that thermally couples the peripheral region to the thermally conductive material.