公开(公告)号：US20190332407A1

公开(公告)日：2019-10-31

申请号：US16349961

申请日：2016-12-14

Applicant: INTEL CORPORATION

Inventor： Yunhong Jiang ,  Chao Peng ,  Yao Zu Dong

IPC: G06F9/455 ,  G06F9/30 ,  G06F16/11

Abstract: A host machine includes a guest machine, a device emulator, and a hypervisor communicably coupled to the guest machine and the device emulator. The guest machine executes a non-real time thread that causes a non-real time I/O emulation by the device emulator. Responsive to receipt of a real time thread by the guest machine, the hypervisor determines whether the non-real time I/O emulation is abortable or non-abortable. If abortable, the hypervisor aborts the non-real time thread and causes the guest machine to execute the real time thread. Upon completing the execution of the real time thread, the hypervisor causes the guest machine to revert to a non-real time context based on a previous system snapshot. Upon establishing the non-real time context, the hypervisor causes the guest machine to execute the previously aborted non-real time thread.

公开(公告)号：US11281482B2

公开(公告)日：2022-03-22

申请号：US16349961

申请日：2016-12-14

Applicant: Intel Corporation

Inventor： Yunhong Jiang ,  Chao Peng ,  Yao Zu Dong

IPC: G06F9/455 ,  G06F16/11 ,  G06F9/30

Abstract: A host machine includes a guest machine, a device emulator, and a hypervisor communicably coupled to the guest machine and the device emulator. The guest machine executes a non-real time thread that causes a non-real time I/O emulation by the device emulator. Responsive to receipt of a real time thread by the guest machine, the hypervisor determines whether the non-real time I/O emulation is abortable or non-abortable. If abortable, the hypervisor aborts the non-real time thread and causes the guest machine to execute the real time thread. Upon completing the execution of the real time thread, the hypervisor causes the guest machine to revert to a non-real time context based on a previous system snapshot. Upon establishing the non-real time context, the hypervisor causes the guest machine to execute the previously aborted non-real time thread.

公开(公告)号：US10698620B2

公开(公告)日：2020-06-30

申请号：US15553845

申请日：2015-03-27

Applicant: Intel Corporation

Inventor： Chao Peng ,  Yao Zu Dong

IPC: G06F3/06 ,  G06F12/0842 ,  G06F12/0888 ,  G06F12/0855 ,  G06F12/0802

Abstract: One embodiment provides a system. The system includes a processor, a cache memory, a performance monitoring unit (PMU), at least one virtual machine (VM), and cache sensitivity index (CSI) logic. The processor includes at least one core. The at least one virtual machine (VM) is to execute on at least one of the at least one core. The cache sensitivity index (CSI) logic is to allocate a cache portion to a selected VM, the allocated cache portion related to a determined cache portion, determined based, at least in part, on a CSI related to the selected VM.