公开(公告)号：US10658297B2

公开(公告)日：2020-05-19

申请号：US16024834

申请日：2018-06-30

Applicant: Intel Corporation

Inventor： Andrea Redaelli ,  D. Ross Economy ,  Mihir Bohra

IPC: H01L47/00 ,  H01L23/48 ,  H01L21/4763 ,  H01L21/44 ,  H01L23/532 ,  G11C8/14 ,  H01L21/3205 ,  H01L23/522 ,  G11C7/18 ,  H01L27/24

Abstract: A nonvolatile memory device includes a metal silicon nitride layer on a three-dimensional (3D) crosspoint architecture, where the metal silicon nitride layer is in the memory array processing. The metal silicon nitride layer is patterned in accordance with the memory array structure, rather than being an underlying layer for a metal layer. The metal layer provides bitline or wordline select paths, and can connect to a via in parallel with the memory array stack. The metal silicon nitride layer is between the metal layer and the memory array, and is not present over the via.