公开(公告)号：US20200285420A1

公开(公告)日：2020-09-10

申请号：US16882833

申请日：2020-05-26

Applicant: Intel Corporation

Inventor： FRANCESC GUIM BERNAT ,  KARTHIK KUMAR ,  DONALD FAW ,  THOMAS WILLHALM

IPC: G06F3/06 ,  G06F13/40 ,  G06F1/30

Abstract: In one embodiment, an apparatus includes: a first queue to store requests that are guaranteed to be delivered to a persistent memory; a second queue to store requests that are not guaranteed to be delivered to the persistent memory; a control circuit to receive the requests and to direct the requests to the first queue or the second queue; and an egress circuit coupled to the first queue to deliver the requests stored in the first queue to the persistent memory even when a power failure occurs. Other embodiments are described and claimed.