公开(公告)号：US20230409759A1

公开(公告)日：2023-12-21

申请号：US17844383

申请日：2022-06-20

Applicant: Intel Corporation

Inventor： Boris Dolgunov ,  Maulik L. Dhada ,  William John Bainbridge ,  Siva Bhanu Krishna Boga ,  Ruben Daniel Varela Velasco ,  David Deitcher

IPC: G06F21/78 ,  G06F21/57 ,  G06F21/60 ,  G06F21/31

CPC classification number: G06F21/78 ,  G06F21/575 ,  G06F21/604 ,  G06F21/31

Abstract: Embodiments described herein may include apparatus, systems, techniques, or processes that are directed to access control mechanisms used to protect isolated memory regions. Embodiments described herein enable a distributed and efficient register structure enabling system providers to reduce cost and improve system performance while preventing malicious devices from accessing isolated memory regions. Isolated memory region access control registers are distributed through multiple access points or bridges but each may be optimized and minimized to allow fast and efficient access control. Other embodiments may be described and/or claimed.

公开(公告)号：US20230092152A1

公开(公告)日：2023-03-23

申请号：US17482965

申请日：2021-09-23

Applicant: Intel Corporation

Inventor： Ofir Shwartz ,  David Deitcher

IPC: G06F21/62 ,  G06F21/44 ,  G06F21/60 ,  G06F12/14

Abstract: An embodiment of an integrated circuit may comprise a management controller and circuitry communicatively coupled to the management controller, the circuitry to apply two or more respective controls to statistical data from two or more respective data sources in accordance with respective configuration information for each data source, and store the statistical data in a memory in accordance with the applied two or more controls. Other embodiments are disclosed and claimed.