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公开(公告)号：US20210165712A1
公开(公告)日：2021-06-03
申请号：US17171430
申请日：2021-02-09
Applicant: Intel Corporation
Inventor： Debarnab Mitra , Zion S. Kwok , Ravi H. Motwani
Abstract: An embodiment of an electronic apparatus comprises one or more substrates, and logic coupled to the one or more substrates, the logic to detect unreliable messages between check nodes and variable nodes in association with an error correction operation, determine respective degrees of unreliability for the unreliable messages, and reduce an influence of the unreliable messages on the error correction operation, as compared to an influence of reliable messages between the check nodes and the variables nodes, based on the determined respective degrees of unreliability. Other embodiments are disclosed and claimed.
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公开(公告)号：US12176918B2
公开(公告)日：2024-12-24
申请号：US17183223
申请日：2021-02-23
Applicant: Intel Corporation
Inventor： Debarnab Mitra , Santhosh K. Vanaparthy
Abstract: An embodiment of an electronic apparatus may comprise one or more substrates, and a decoder coupled to the one or more substrates, the decoder including logic to perform a first decode stage with a first fixed quantization width, and perform a second decode stage with a second fixed quantization width that is different from the first fixed quantization width. Other embodiments are disclosed and claimed.
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公开(公告)号：US12169435B2
公开(公告)日：2024-12-17
申请号：US17171430
申请日：2021-02-09
Applicant: Intel Corporation
Inventor： Debarnab Mitra , Zion S. Kwok , Ravi H. Motwani
Abstract: An embodiment of an electronic apparatus comprises one or more substrates, and logic coupled to the one or more substrates, the logic to detect unreliable messages between check nodes and variable nodes in association with an error correction operation, determine respective degrees of unreliability for the unreliable messages, and reduce an influence of the unreliable messages on the error correction operation, as compared to an influence of reliable messages between the check nodes and the variables nodes, based on the determined respective degrees of unreliability. Other embodiments are disclosed and claimed.
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公开(公告)号：US20210175901A1
公开(公告)日：2021-06-10
申请号：US17183223
申请日：2021-02-23
Applicant: Intel Corporation
Inventor： Debarnab Mitra , Santhosh K. Vanaparthy
Abstract: An embodiment of an electronic apparatus may comprise one or more substrates, and a decoder coupled to the one or more substrates, the decoder including logic to perform a first decode stage with a first fixed quantization width, and perform a second decode stage with a second fixed quantization width that is different from the first fixed quantization width. Other embodiments are disclosed and claimed.
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