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公开(公告)号：US20250005157A1
公开(公告)日：2025-01-02
申请号：US18217453
申请日：2023-06-30
Applicant: Intel Corporation
Inventor： Hisham SHAFI , Scott CAPE , Jeffrey WIEDEMEIER
Abstract: An apparatus and method are described for authenticating extended service microcode updates. For example, one embodiment of a method comprises: storing extended service microcode update (MCU) in a memory of a processor; reading processor signature data, platform identification data, and processor extended service data from one or more registers of the processor; identifying MCU extended service period data based on processor signature data and platform identification data; determining whether to apply the extended service MCU on the processor based on a comparison between the MCU extended service period data and the processor extended service data.
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2.发明申请公开(公告)号：US20190095357A1
公开(公告)日：2019-03-28
申请号：US15719222
申请日：2017-09-28
Applicant: Intel Corporation
Inventor： Meltem OZSOY , Vedvyas SHANBHOGUE , Krystof C. ZMUDZINSKI , Francis X. MCKEEN , Carlos V. ROZAS , Ilya ALEXANDROVICH , Ittai ANATI , Raghunandan MAKARAM , Dror CASPI , Hisham SHAFI
Abstract: A system includes a processor core and main memory. The processor core is to, in response to execution of a patch-load instruction, retrieve, from a predetermined area of the main memory, memory protection metadata and a memory range of reserved memory, wherein the reserved memory is not flexibly convertible to enclave pages. The processor core is further to retrieve a bit from an architectural control register, wherein a value of the bit is to indicate whether an operating system is capable of management of flexibly-convertible enclave pages. The processor core is further to activate, using the memory protection metadata and one of the first information or the second information, a mode of protected memory management for the processor core in response to the value of the bit in the architectural control register.
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