公开(公告)号：US10884735B2

公开(公告)日：2021-01-05

申请号：US15905623

申请日：2018-02-26

Applicant: Intel Corporation

Inventor： Jayesh Iyer ,  Jamison Collins ,  Sebastian Winkel ,  Howard Chen

IPC: G06F9/30

Abstract: A processor includes a front end to receive an instruction. The processor also includes a core to execute the instruction. The core includes logic to execute a base function of the instruction to yield a result, generate a predicate value of a comparison of the result based upon a predication setting in the instruction, and set the predicate value in a register. The processor also includes a retirement unit to retire the instruction.

公开(公告)号：US20190042247A1

公开(公告)日：2019-02-07

申请号：US15905623

申请日：2018-02-26

Applicant: Intel Corporation

Inventor： Jayesh Iyer ,  Jamison Collins ,  Sebastian Winkel ,  Howard Chen

IPC: G06F9/30

Abstract: A processor includes a front end to receive an instruction. The processor also includes a core to execute the instruction. The core includes logic to execute a base function of the instruction to yield a result, generate a predicate value of a comparison of the result based upon a predication setting in the instruction, and set the predicate value in a register. The processor also includes a retirement unit to retire the instruction.