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公开(公告)号:US20190004972A1
公开(公告)日:2019-01-03
申请号:US15637524
申请日:2017-06-29
Applicant: Intel Corporation
Inventor: Uri Bear , Gyora Benedek , Baruch Chaikin , Jacob Jack Doweck , Reuven Elbaum , Dimitry Kloper , Elad Peer , Chaim Shen-orr , Yonatan Shlomovich
IPC: G06F12/14 , G06F12/1009
Abstract: Various systems and methods for detecting and preventing side-channel attacks, including attacks aimed at discovering the location of KASLR-randomized privileged code sections in virtual memory address space, are described. In an example, a computing system includes electronic operations for detecting unauthorized attempts to access kernel virtual memory pages via trap entry detection, with operations including: generating a trap page with a physical memory address; assigning a phantom page at an open location in the privileged portion of the virtual memory address space; generating a plurality of phantom page table entries corresponding to an otherwise-unmapped privileged virtual memory region; placing the trap page in physical memory and placing the phantom page table entry in a page table map; and detecting an access to the trap page via the phantom page table entry, to trigger a response to a potential attack.
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公开(公告)号:US10909015B2
公开(公告)日:2021-02-02
申请号:US15396293
申请日:2016-12-30
Applicant: Intel Corporation
Inventor: Ahmad Yasin , Moshe Cohen , Jacob Jack Doweck
Abstract: An apparatus and method are described for generating performance metrics of a processor. For example, one embodiment of a processor comprises: one or more simultaneous multithreading cores to simultaneously execute multiple instruction threads; a plurality of performance monitor counters, each to maintain a count of events occurring as a result of the execution of the multiple instruction threads; and a performance monitor unit to generate a plurality of performance metric values using the event counts stored in the performance monitor counters and in response to receipt of a request from software for the performance metric values.
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