公开(公告)号：US11132124B2

公开(公告)日：2021-09-28

申请号：US16006752

申请日：2018-06-12

Applicant: Intel Corporation

Inventor： Olivia Wu ,  Prashant Arora ,  Jason Ko

IPC: G06F17/16 ,  G06F3/06 ,  G06N3/08 ,  G06N3/063 ,  G06N3/04 ,  G06T1/60

Abstract: One embodiment provides an apparatus. The apparatus may include memory circuitry to store tensor data representing a tensor. The apparatus may include memory controller circuitry to access the memory circuitry. The apparatus may include processor circuitry to: receive a request for a tensor operation; generate a plurality of sub-commands for the tensor operation; and provide the sub-commands to memory controller circuitry to perform the tensor operation based on instructions contained in one or more of the sub-commands. The instructions contained in one or more of the sub-commands may include identify addresses in memory to access; activate one or more rows in the memory circuitry that correspond to the addresses; and transfer tensor data to and/or from the memory circuitry.