公开(公告)号：US10725848B2

公开(公告)日：2020-07-28

申请号：US15890893

申请日：2018-02-07

Applicant: Intel Corporation

Inventor： Tsvika Kurts ,  Ki W. Yoon ,  Michael J. St. Clair ,  Larisa Novakovsky ,  Hisham Shafi ,  William H. Penner ,  Yoni Aizik ,  Kevin Safford ,  Hermann Gartler

IPC: G06F11/00 ,  G06F11/07 ,  G06F9/38

Abstract: Embodiment of this disclosure provides a mechanism to support hang detection and data recovery in microprocessor systems. In one embodiment, a processing device comprising a processing core and a crashlog unit operatively coupled to the core is provided. An indication of an unresponsive state in an execution of a pending instruction by the core is received. Responsive to receiving the indication, a crash log comprising data from registers of at least one of: a core region, a non-core region and a controller hub associated with the processing device is produced. Thereupon, the crash log is stored in a shared memory of a power management controller (PMC) associated with the controller hub.

公开(公告)号：US20190243701A1

公开(公告)日：2019-08-08

申请号：US15890893

申请日：2018-02-07

Applicant: Intel Corporation

Inventor： Tsvika Kurts ,  Ki W. Yoon ,  Michael J. St. Clair ,  Larisa Novakovsky ,  Hisham Shafi ,  William H. Penner ,  Yoni Aizik ,  Kevin Safford ,  Hermann Gartler

IPC: G06F11/07 ,  G06F9/38

Abstract: Embodiment of this disclosure provides a mechanism to support hang detection and data recovery in microprocessor systems. In one embodiment, a processing device comprising a processing core and a crashlog unit operatively coupled to the core is provided. An indication of an unresponsive state in an execution of a pending instruction by the core is received. Responsive to receiving the indication, a crash log comprising data from registers of at least one of: a core region, a non-core region and a controller hub associated with the processing device is produced. Thereupon, the crash log is stored in a shared memory of a power management controller (PMC) associated with the controller hub.