公开(公告)号：US11029960B2

公开(公告)日：2021-06-08

申请号：US16214012

申请日：2018-12-07

Applicant: Intel Corporation

Inventor： Marek Targowski ,  Konrad Trifunović

IPC: G06F9/38 ,  G06F9/30

Abstract: Apparatus and method for widened SIMD execution on a limited register file. For example, one embodiment of an apparatus comprises: instruction dispatch circuitry to dispatch instructions of a thread for execution, including a first instruction to indicate a start of a double execution instruction sequence and a second instruction to indicate an end of a double execution instruction sequence; and execution circuitry including single instruction multiple data (SIMD) circuitry, the execution circuitry to execute the double execution instruction sequence in a first pass using a first set of lanes of the SIMD circuitry and to execute the double execution instruction sequence in a second pass following the first pass using a second set of lanes of the SIMD circuitry.