公开(公告)号：US20200310797A1

公开(公告)日：2020-10-01

申请号：US16370915

申请日：2019-03-30

Applicant: Intel Corporation

Inventor： Jesus Corbal ,  Rohan Sharma ,  Simon Steely, JR. ,  Chinmay Ashok ,  Kent D. Glossop ,  Dennis Bradford ,  Paul Caprioli ,  Louise Huot ,  Kermin ChoFleming ,  Barry Tannenbaum

IPC: G06F9/30 ,  G06F9/54

Abstract: Systems, methods, and apparatuses relating to swizzle operations and disable operations in a configurable spatial accelerator (CSA) are described. Certain embodiments herein provide for an encoding system for a specific set of swizzle primitives across a plurality of packed data elements in a CSA. In one embodiment, a CSA includes a plurality of processing elements, a circuit switched interconnect network between the plurality of processing elements, and a configuration register within each processing element to store a configuration value having a first portion that, when set to a first value that indicates a first mode, causes the processing element to pass an input value to operation circuitry of the processing element without modifying the input value, and, when set to a second value that indicates a second mode, causes the processing element to perform a swizzle operation on the input value to form a swizzled input value before sending the swizzled input value to the operation circuitry of the processing element, and a second portion that causes the processing element to perform an operation indicated by the second portion the configuration value on the input value in the first mode and the swizzled input value in the second mode with the operation circuitry.

公开(公告)号：US10817291B2

公开(公告)日：2020-10-27

申请号：US16370915

申请日：2019-03-30

Applicant: Intel Corporation

Inventor： Jesus Corbal ,  Rohan Sharma ,  Simon Steely, Jr. ,  Chinmay Ashok ,  Kent D. Glossop ,  Dennis Bradford ,  Paul Caprioli ,  Louise Huot ,  Kermin ChoFleming ,  Barry Tannenbaum

IPC: G06F9/30 ,  G06F15/82

Abstract: Systems, methods, and apparatuses relating to swizzle operations and disable operations in a configurable spatial accelerator (CSA) are described. Certain embodiments herein provide for an encoding system for a specific set of swizzle primitives across a plurality of packed data elements in a CSA. In one embodiment, a CSA includes a plurality of processing elements, a circuit switched interconnect network between the plurality of processing elements, and a configuration register within each processing element to store a configuration value having a first portion that, when set to a first value that indicates a first mode, causes the processing element to pass an input value to operation circuitry of the processing element without modifying the input value, and, when set to a second value that indicates a second mode, causes the processing element to perform a swizzle operation on the input value to form a swizzled input value before sending the swizzled input value to the operation circuitry of the processing element, and a second portion that causes the processing element to perform an operation indicated by the second portion the configuration value on the input value in the first mode and the swizzled input value in the second mode with the operation circuitry.