公开(公告)号：US10095629B2

公开(公告)日：2018-10-09

申请号：US15279319

申请日：2016-09-28

Applicant: Intel Corporation

Inventor： Francesc Cesc Guim Bernat ,  Kshitij A. Doshi ,  Steen Larsen ,  Mark A Schmisseur ,  Raj K. Ramanujan

IPC: G06F13/00 ,  G06F12/10

Abstract: Generally discussed herein are systems, devices, and methods for local and remote dual address decoding. According to an example a node can include one or more processors to generate a first memory request, the first memory request including a first address and a node identification, a caching agent coupled to the one or more processors, the caching agent to determine that the first address is homed to a remote node remote to the local node, a network interface controller (NIC) coupled to the caching agent, the NIC to produce a second memory request based on the first memory request, and the one or more processors further to receive a response to the second memory request, the response generated by a switch coupled to the NIC, the switch includes a remote system address decoder to determine a node identification to which the second memory request is homed.