公开(公告)号：US20220129329A1

公开(公告)日：2022-04-28

申请号：US17434720

申请日：2019-03-29

Applicant: Intel Corporation

Inventor： Mikhail PLOTNIKOV ,  Mikhail SHIRYAEV

IPC: G06F9/52 ,  G06F9/54

Abstract: Technologies for managing data wait barrier operations include starting a receive operation associated with a receive buffer of a compute node that includes a plurality of chunks of data received from a sender compute node. Each of the plurality of chunks of data may be received in an out-of-order sequence relative to an order in which they were transmitted from the sender compute node. The compute node may determine whether a chunk of data in the receive buffer satisfies a condition to be met prior to performing one or more data wait barrier operations to be performed by the compute node to process the chunk of data and, if so, perform a partial computation over the chunk of data.