公开(公告)号：US20240006735A1

公开(公告)日：2024-01-04

申请号：US17853597

申请日：2022-06-29

Applicant: Intel Corporation

Inventor： Georgios C. DOGIAMIS ,  Neelam PRABHU GAUNKAR ,  Nada SEKELJIC

IPC: H04B1/40 ,  H01P3/16 ,  H01P11/00

CPC classification number: H04B1/40 ,  H01P11/006 ,  H01P3/16

Abstract: Embodiments herein relate to systems, apparatuses, or processes for packages that include transceivers that are at least partly positioned underneath a waveguide launcher array to decrease the maximum signal transmission time between the transceiver and the waveguide launcher array. This configuration may increase the overall data transmission rate between a die and waveguides coupled with the waveguide launcher array. Other embodiments may be described and/or claimed.