公开(公告)号：US20170323638A1

公开(公告)日：2017-11-09

申请号：US15525893

申请日：2014-12-12

Applicant: INTEL CORPORATION

Inventor： Lukasz MALINOWSKI ,  Piotr MAJCHER ,  Georg STEMMER ,  Piotr ROZEN ,  Joachim HOFER ,  Josef BAUER

IPC: G10L15/193 ,  G10L15/22

CPC classification number: G10L15/193 ,  G10L15/083 ,  G10L15/22 ,  G10L15/34

Abstract: A system, article, and method of automatic speech recognition using parallel processing for weighted finite state transducer-based speech decoding.

公开(公告)号：US20200026515A1

公开(公告)日：2020-01-23

申请号：US16338324

申请日：2016-10-20

Applicant: Intel Corporation

Inventor： Robert Valentine ,  Galina RYVCHIN ,  Piotr MAJCHER ,  Mark J. CHARNEY ,  Elmoustapha OULD-AHMED-VALL ,  Jesus CORBAL ,  Milind B. GIRKAR ,  Zeev SPERBER ,  Simon RUBANOVICH ,  Amit GRADSTEIN

IPC: G06F9/30 ,  G06F9/38 ,  G06F7/544

Abstract: In some embodiments, packed data elements of first and second packed data source operands are of a first, different size than a second size of packed data elements of a third packed data operand. Execution circuitry executes decoded single instruction to perform, for each packed data element position of a destination operand, a multiplication of a M N-sized packed data elements from the first and second packed data sources that correspond to a packed data element position of the third packed data source, add of results from these multiplications to a full-sized packed data element of a packed data element position of the third packed data source, and storage of the addition result in a packed data element position destination corresponding to the packed data element position of the third packed data source, wherein M is equal to the full-sized packed data element divided by N.