公开(公告)号：US20170344483A1

公开(公告)日：2017-11-30

申请号：US15168980

申请日：2016-05-31

Applicant: Intel Corporation

Inventor： STANISLAV SHWARTSMAN ,  RON RAIS

IPC: G06F12/0862 ,  G06F12/0875

Abstract: In an embodiment, a processor includes a plurality of cores, with at least one core including prefetch logic. The prefetch logic comprises circuitry to: receive a prefetch request; compare the received prefetch request to a plurality of entries of a prefetch filter cache; and in response to a determination that the received prefetch request matches one of the plurality of entries of the prefetch filter cache, drop the received prefetch request. Other embodiments are described and claimed.