公开(公告)号：US20210097449A1

公开(公告)日：2021-04-01

申请号：US17120059

申请日：2020-12-11

Applicant: Intel Corporation

Inventor： Rita Chattopadhyay ,  Rajesh Bansal

IPC: G06N20/20 ,  G06N5/00 ,  G06N5/04

Abstract: In one embodiment, a processing device for training a decision tree model includes memory and processing circuitry. The processing circuitry allocates a tree node array in memory, where the number of array elements in the tree node array equals the number of data samples in a training dataset. The processing circuitry also obtains the training dataset, which contains data samples captured at least partially by sensor(s). The processing circuitry then trains the decision tree model. For example, a root node is initially assigned to the data samples in the training dataset. The root node is recursively split into child nodes based on identified branch conditions, where each child node is assigned to a subset of data samples. The tree node array is continuously updated during training to identify the child nodes assigned to the data samples. The processing circuitry then stores the trained decision tree model in memory.