公开(公告)号：US10991665B2

公开(公告)日：2021-04-27

申请号：US16326084

申请日：2016-09-29

Applicant: Intel Corporation

Inventor： Hao-Han Hsu ,  Dong-Ho Han ,  Steven C. Wachtman ,  Ryan K. Kuhlmann

IPC: H01L23/64 ,  H01L21/48 ,  H01L23/498 ,  H01L23/552 ,  H01P1/20

Abstract: A semiconductor package and a packaged electronic device are described. The semiconductor package has a foundation layer and a planar filtering circuit. The circuit is formed in the foundation layer to provide EMI/RFI mitigation. The circuit has one or more conductive traces that are patterned to form an equivalent circuit of inductors and capacitors. The one or more conductive traces include planar metal shapes, such as meanders, loops, inter-digital fingers, and patterned shapes, to reduce the z-height of the package. The packaged electronic device has a semiconductor die, a foundation layer, a motherboard, a package, and the circuit. The circuit removes undesirable interferences generated from the semiconductor die. The circuit has a z-height that is less than a z-height of solder balls used to attach the foundation layer to the motherboard. A method of forming a planar filtering circuit in a foundation layer is also described.