公开(公告)号：US20210321516A1

公开(公告)日：2021-10-14

申请号：US17354540

申请日：2021-06-22

Applicant: Intel Corporation

Inventor： Raghavendra RAO ,  Ranjul BALAKRISHNAN ,  Shailendra Singh CHAUHAN ,  Sandesh Krishnamurthy GEEJAGAARU

IPC: H05K1/11 ,  H05K1/14

Abstract: A memory module has pads on the top and bottom surfaces of a module printed circuit board (PCB). The pads match the pin layout of one or more memory devices to be mounted on the memory module. The pads on one surface of the PCB electrically interconnect to the memory device(s), and the pads on the other surface electrically interconnect to pads on a system board, such as a motherboard. With the pad layout on the memory module, the pad layout of the system board can be the same for a memory-down implementation and for a removable memory module. The pad layout provides good signal-to-noise performance and can enable a memory module for low power double data rate (LPDDR) memory, double data rate (DDR) memory, and graphics double data rate (GDDR) memory.