公开(公告)号：US09588882B2

公开(公告)日：2017-03-07

申请号：US14094743

申请日：2013-12-02

Applicant: Intel Corporation

Inventor： Scott E. Nelson ,  Zion S. Kwok

IPC: G06F12/00 ,  G06F12/02 ,  G06F3/06 ,  G06F12/04

CPC classification number: G06F12/0238 ,  G06F3/06 ,  G06F12/04 ,  Y02D10/13

Abstract: Methods and apparatus related to non-volatile memory page sector rotation are described. In one embodiment, logic rotates the order of one or more sectors by a rotation value prior to storage of the one or more sectors in a non-volatile memory device. Logic then rotates the one or more sectors back by the rotation value after reading the one or more sectors from the non-volatile memory device. Furthermore, at least one indirection block (corresponding to the one or more sectors) is stored in at least two different logical memory pages of the non-volatile memory. Other embodiments are also disclosed and claimed.

Abstract translation: 描述与非易失性存储器页扇区旋转相关的方法和装置。 在一个实施例中，逻辑在将一个或多个扇区存储在非易失性存储器设备中之前将一个或多个扇区的顺序旋转一个旋转值。 逻辑然后在从非易失性存储器件读取一个或多个扇区之后使一个或多个扇区回转旋转值。 此外，至少一个间接块（对应于一个或多个扇区）被存储在非易失性存储器的至少两个不同的逻辑存储器页中。 还公开并要求保护其他实施例。

公开(公告)号：US09298552B2

公开(公告)日：2016-03-29

申请号：US14040554

申请日：2013-09-27

Applicant: Intel Corporation

Inventor： Lark-Hoon Leem ,  Xin Guo ,  Ravi H. Motwani ,  Rosanna Yee ,  Scott E. Nelson

IPC: H03M13/00 ,  G06F11/14 ,  G06F11/10

CPC classification number: G06F11/141 ,  G06F11/1012

Abstract: Provided are an apparatus, system, and method for performing an error recovery operation with respect to a read of a block of memory cells in a storage device. A current iteration of a decoding operation is performed by applying at least one reference voltage for the current iteration to a block of the memory cells in the storage device to determine current read values in response to applying the reference voltage. A symbol is generated for each of the read memory cells by combining the determined current read value with at least one value saved during the previous iteration. The symbols are used to determine bit reliability metrics for the block of memory cells. The bit reliability metrics are decoded. In response to the decoding failing, an additional iteration of the decoding operation is performed.

Abstract translation: 提供了一种用于对存储装置中的存储单元块的读取执行错误恢复操作的装置，系统和方法。 通过对当前迭代中的至少一个参考电压施加到存储装置中的存储器单元的块来执行解码操作的当前迭代，以响应于施加参考电压来确定当前读取值。 通过将确定的当前读取值与在先前迭代中保存的至少一个值组合，为每个读取的存储器单元生成符号。 这些符号用于确定存储器单元块的位可靠性度量。 比特可靠性度量被解码。 响应于解码失败，执行解码操作的附加迭代。